Micron Technology Assigned Patent for Non-volatile Memory Cell Devices and Methods

By Targeted News Service

ALEXANDRIA, Va., Sept. 22 -- Micron Technology, Boise, Idaho, has been assigned a patent (8,268,692) developed by Gurtej S. Sandhu, Boise, Idaho, and Kirk D. Prall, Boise, Idaho, for "non-volatile memory cell devices and methods."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming an intergate dielectric layer over the nanodots, where the intergate dielectric layer encases the nanodots. To form sidewalls of the memory cell, a portion of the intergate dielectric layer is removed with a dry etch, where the sidewalls include a location where a nanodot has been deposited. A spacing layer is formed over the sidewalls to cover the location where a nanodot has been deposited and the remaining portion of the intergate dielectric layer and the nanodots can be removed with an etch selective to the intergate dielectric layer."

The patent application was filed on June 7, 2011 (13/154,618). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,268,692&OS=8,268,692&RS=8,268,692

Written by Satyaban Rath; edited by Hemanta Panigrahi.

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